Intel already uses AIB in so called 2.5-D packages, which integrate multiple chips on top of a silicon interposer chip, which is then packaged up, Intel senior principal engineer Sergey Shumarayev told engineers at the event. The company’s Stratix 10 FPGA is one example.

Andreas Olofsson, manager for Darpa’s CHIPS program, which includes chiplets research noted the need for a standard communications interface. “First we need a plug-and-play standard—a sort of ethernet for chiplets,” he said. “Once we have that standard you can imagine vendors offering a number of chiplets for sale.” Intel is pushing AIB to become that standard.

Interconnects using the standard will have to be capable of handling a lot of data without expending much energy. It will have to cost less than 1 picojoule to move a bit and be capable of moving 1 terabit per millimeter.

Other companies are also researching ways to make chiplets work. AMD unveiled a way to keep networks of chiplets from falling into a state of paralysis last month.